1. Field of the Invention
The present invention relates to a method of fabricating a mask ROM by which the bury implantation step can be shifted and combined with the back-end process, thereby improving the efficiency of the delivery of mask ROMs.
2. Description of the Related Art
FIGS. 1A to 1C shows the conventional process of fabricating a mask ROM in cross-sectional view. First, a plurality of MOS transistors serving as memory cells are formed in a semiconductor substrate 1, as depicted in FIG. 1A. In FIG. 1A, numeral 2 indicates an isolation structure which is usually a field oxide layer formed via LOCOS method; numeral 3 indicates the polysilicon gate of one of the MOS transistors (the gate oxide layer is not shown) and numeral 4 indicates the source and drain (n.sup.+ diffusion regions) of one of the MOS transistors. Next, a photoresist layer 5 is formed over the MOS transistors, and is then defined and patterned using a code mask in conjunction with photolithography, as depicted in FIG. 1B. Then, a bury implantation is carried out to complete the coding process of the mask ROM, as depicted in FIG. 1C.
In the bury implantation step, MOS transistors with their gates revealed by the photoresist layer 5 will be defined as the memory cells having coded data "0". On the other hand, MOS transistors with their gates covered by the photoresist layer 5 will be defined as the memory cells having coded data "1".
After the bury implantation step, subsequent back-end process steps are carried out such as: (a) removing the photoresist layer 5; (b) forming a BPSG layer over the MOS transistors; (c) carrying out a first metalization process; (d) forming a dielectric layer; (e) forming via holes by using a via mask; (f) carrying out a second metallization process etc., and finally forming a passivation layer.
IC manufacturers typically fabricate in advance a mask ROM prepared structure as described in FIG. 1A. When given orders for mask ROMs by customers, IC manufacturers start to fabricate the code mask according to a code specification required by the customers. Then, the code mask is used to pattern the photoresist layer to reveal the MOS transistors to be implanted (coded), as described in FIG. 1B. Next, the bury implantation process is carried out for encoding memory data, thereby completing the mask ROM required by the customers as described in FIG. 1C. However, the mask ROM can not deliver to the customers, until the steps (a)-(f) of the back-end process are performed. Consequently, the delivery of finished products (mask ROM) to the customers depends on the required time for completing the above process.
For IC manufacturers, prompt delivery of finished products means profits and competitive edge. If the bury implantation step can be shifted and combined with the back-end process, then the fabrication of mask ROMs can be simplified and the efficiency of delivery is improved.